Existing stores or memories are organized into words constituted by several bits. The number of words is generally a power of two. As there is often a need for stores having a matrix form, the distribution of these words corresponds to matrixes of 2.sup.p by 2.sup.q words. In this case, for reading or writing a word in the store, it is merely necessary to display a column address X on a first group of p address wires and a row address Y on a second group of q address wires.
However, it is sometimes desirable to have a store of A.times.B words, in which the numbers A and B are not powers of two. This is particularly the case with alphanumeric screen memories, where is a need for 80.times.24 characters (or 80.times.25) or graphic screen memories with a facsimile format with 1728.times.2288 points in which the points are grouped in words of 64 bits, which leads to 27.times.2288 word memories.
When A and B are not powers of two, it is possible to write: EQU 2.sup.p &lt;A&lt;2.sup.p+1 EQU 2.sup.q &lt;B&lt;2.sup.q+1 ( 1)
p and q being exponents of the closest powers of 2 below A and B.
In other words, this means that A is expressed by p+1 bits and B by q+1 bits. Two cases can occur: EQU if 2.sup.p+q+1 &lt;A.times.B&lt;2.sup.p+q+2 ( 2)
it is necessary to use a memory with 2.sup.p+q+2 words and it is then necessary merely to respectively increase A and B by 2.sup.p+1 and 2.sup.q+1. EQU if 2.sup.p+q &lt;A.times.B&lt;2.sup.p+q+1 ( 3)
it is also possible to use a memory with 2.sup.p+q+2 words, but it would be poorly used, because the half between 2.sup.p+q+1 and 2.sup.p+q+2 would be unused.